Commit eda171a9 authored by Wilson Snyder's avatar Wilson Snyder
Browse files

Update verilog-mode.el

* verilog-mode.el (verilog-read-decls, verilog-calc-1): Fix
"default clocking" indentation and preventing AUTOs from working,
bug1084.  Reported by Alan Morgan.
(verilog-diff-report): Fix `verilog-diff-report'
not returning bad status on differences, bug1087.  Reported by
Eric Jackowski.
(verilog-auto-inst-param-value)
(verilog-auto-inst-param-value-type, verilog-read-sub-decls)
(verilog-read-sub-decls-expr, verilog-read-sub-decls-gate)
(verilog-read-sub-decls-line, verilog-read-sub-decls-sig)
(verilog-read-sub-decls-type): When
`verilog-auto-inst-param-value-type' is set, which is now the
default, AUTOINPUT etc will now substitute parameter types from
submodules, bug1061.  Reported by Brad Dobbie.
(verilog-auto-reset, verilog-backward-case-item)
(verilog-extended-case-re, verilog-read-always-signals-recurse):
Fix indentation of randcase, bug1072. Reported by David Rogoff.
(verilog-read-sub-decls-expr)
(verilog-sig-multidim-string): Fix AUTOINST ordering of dimensions
in generated comments, bug1057. Reported by Kaushal Modi.
(verilog-auto-wire-comment, verilog-insert-definition):
Add `verilog-auto-wire-comment' to suppress wire comments. Reported by
Eric Jackowski.
(verilog-extended-complete-re): Fix indentation
of class static functions, bug1053. Reported by Gregory
Czajkowski.
(verilog-module-filenames): Support tramp for
finding verilog modules. Reported by Nevada Sanchez.
parent 2f5e0b1b
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