Verilog-Mode collected updates.

* lisp/progmodes/verilog-mode.el (verilog-read-decls): Fix to skip
over base64-encoded protected data while reading AUTO declarations.
Reported by Berend Ozceri.
(verilog-auto-inst-port, verilog-auto-inst-vector): Support 'unsigned'
in `verilog-auto-inst-vector'. Reported by Jeff Riley.
(verilog-read-decls): Fix to ignore `line in AUTOINST, git
bug18. Reported by Berend Ozceri.
(verilog-library-extensions): Support .va /.vah/.sva/.svah file
extensions to load verilog-mode for Verilog-AMS.  Reported by Shareef
(verilog-read-sub-decls-expr): Fix AUTOOUTPUT etc misparsing Verilog
casts, bug1526.  Reported by Udi Finkelstein.
1 job for master in 59 minutes and 6 seconds (queued for 2 seconds)
Status Job ID Name Coverage
failed #4187


Name Stage Failure
test-all Test
Makefile:319: recipe for target 'check-doit' failed
make[2]: *** [check-doit] Error 1
make[2]: Leaving directory '/builds/emacs/emacs/test'
Makefile:294: recipe for target 'check-expensive' failed
make[1]: Leaving directory '/builds/emacs/emacs/test'
Makefile:959: recipe for target 'check-expensive' failed
make[1]: *** [check-expensive] Error 2
make: *** [check-expensive] Error 2
ERROR: Job failed: exit code 1